CCD Pixel Binning

Explore how clock signals controlling a CCD can be used to combine integrated charge from adjacent pixels to improve signal-to-noise ratios and increase the readout frame rate. Instructions for operation of the tutorial appear below the applet window.

Error processing SSI file

Use the Binning Array Size pull-down menu to select a size of 2 × 2, 3 × 3, or 4 × 4 pixels. The initialized state of the applet is an array size of 2 × 2, illustrated by a single array of pixels in the upper right-hand corner of the parallel register. After the array size is selected, use the blue arrow buttons to shift pixel charge through the parallel register to the serial register. After all charge has been transferred to the serial register, continued use of the arrow buttons shifts the charge to the summing well. During charge transfer, pixels that are added together are summed and display the resulting color.

Contributing Authors

Mortimer Abramowitz - Olympus America, Inc., Two Corporate Center Drive., Melville, New York, 11747.

John C. Long and Michael W. Davidson - National High Magnetic Field Laboratory, 1800 East Paul Dirac Dr., The Florida State University, Tallahassee, Florida, 32310.